• IP Verification
• UVM
• GPU Pipelines
• SystemVerilog
• C/C++
• RTL Debugging
• Verification Strategy

This role leads IP-level verification for advanced GPU graphics subsystems. You will define verification strategies, develop UVM-based environments, and debug complex RTL and firmware issues. The position requires deep understanding of GPU pipelines, performance features, and verification methodologies. You will also mentor team members and drive methodology improvements. Strong expertise in SystemVerilog, C/C++, and simulation-based debugging is essential.