• x86 Processor IP
• RTL Design Lead
• Power Management
• IP Integration
• Design Signoff
• Low-power Techniques

This role leads RTL design for high-performance x86 processor IPs and subsystems. You will drive micro-architecture, power management features, IP integration, and design optimization. The position includes mentoring engineers and collaborating with DFT, physical design, and SoC teams. Strong experience in full IP design cycles, low-power techniques, and design signoff is required. Leadership and deep digital design expertise are critical.