This role leads physical design execution from RTL to GDSII for high-performance server SoCs. You will own floorplanning, placement, CTS, routing, ext...
This role leads full-chip physical design with a strong focus on power convergence and sign-off. You will oversee RTL-to-GDS execution, low-power impl...
This role focuses on end-to-end physical design delivery for advanced server SoCs. You will work on RTL-to-GDSII implementation including floorplannin...
This role involves hands-on physical design execution for VLSI projects with minimal supervision. You will work on RTL-to-GDSII flows, including floor...
This role specializes in static timing analysis and low-power design for VLSI projects. You will handle constraint development, timing closure, synthe...
This role focuses on physical design and place-and-route (PNR) activities for advanced VLSI technologies. You will independently handle RTL-to-GDSII f...
