• ARM Architecture
• RISC-V
• Micro-architecture
• RTL Design
• Timing Closure
• Team Leadership
• SoC Design

This role leads the design and delivery of ARM and RISC-V based SoC subsystems. You will manage a high-performance engineering team responsible for micro-architecture, RTL design, and timing closure. The position involves close collaboration with architecture and full-chip teams. You will ensure quality execution from concept to production while mentoring engineers. Strong leadership and deep SoC design experience are essential.