Senior Lead RTL Design (FEINT) Engineer ⭐ Featured
AMD
This role focuses on front-end implementation including synthesis, timing closure, CDC, lint, and DFX for high-speed processor designs. You will defin...
This role focuses on front-end implementation including synthesis, timing closure, CDC, lint, and DFX for high-speed processor designs. You will defin...
This role leads the design and delivery of ARM and RISC-V based SoC subsystems. You will manage a high-performance engineering team responsible for mi...
This role focuses on end-to-end physical design delivery for advanced server SoCs. You will work on RTL-to-GDSII implementation including floorplannin...
This role specializes in static timing analysis and low-power design for VLSI projects. You will handle constraint development, timing closure, synthe...