This role involves hands-on physical design execution for VLSI projects with minimal supervision. You will work on RTL-to-GDSII flows, including floor...

This role specializes in static timing analysis and low-power design for VLSI projects. You will handle constraint development, timing closure, synthe...

This role focuses on physical design and place-and-route (PNR) activities for advanced VLSI technologies. You will independently handle RTL-to-GDSII f...