Broadcom

full-time Automation Scripting Characterization Flow Custom Digital Circuits Device Physics 4–9 yrs

full-time ASIC Design Flow Emulation FPGA Hardware Verification 3–8 yrs

full-time Assertion-Based Verification Coverage-Driven Verification Debug EDA Tools 5–10 yrs

full-time ATPG BIST Boundary Scan DFT 2–6 yrs

full-time ATPG Boundary Scan Compression DFT Architecture 8–14 yrs

full-time Advanced Process Nodes Analog Layout Cadence Virtuoso CMOS Technology 2–6 yrs

full-time Advanced Process Nodes Analog Layout Cadence Virtuoso CMOS Technology 2–6 yrs

full-time ASIC Design Constrained-Random Verification Coverage-Driven Verification Debugging 2–6 yrs

full-time ASIC Design Flow Debug Techniques FPGA Prototyping Functional Coverage 3–8 yrs